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Transactional memory
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#	Item
141	Transactional Prefetching: Narrowing the Window of Contention in Hardware Transactional Memory Adri`a Armejach?‡ ? Anurag Negi† Add to Reading List Source URL: transact2012.cse.lehigh.edu Language: English - Date: 2012-02-23 21:17:04
142	STMBench7: A Benchmark for Software Transactional Memory Rachid Guerraoui Michał Kapałka Add to Reading List Source URL: kapalka.eu Language: English - Date: 2010-10-13 15:43:20
143	RMS-TM: A TRANSACTIONAL MEMORY BENCHMARK FOR RECOGNITION, MINING AND SYNTHESIS APPLICATIONS G¨okc¸en Kestor Srdjan Stipic Add to Reading List Source URL: transact09.cs.washington.edu Language: English - Date: 2009-02-04 17:38:50
144	The Case for Hardware Transactional Memory in Software Packet Processing Martin Labrecque and J. Gregory Steffan Department of Electrical and Computer Engineering, University of Toronto {martinl,steffan}@eecg.toronto.edu Add to Reading List Source URL: www.eecg.toronto.edu Language: English - Date: 2010-10-27 09:48:46
145	Context-oriented Software Transactional Memory in Common Lisp Pascal Costanza Charlotte Herzeel Add to Reading List Source URL: www.p-cos.net Language: English - Date: 2009-09-03 10:29:04
146	STM in the Small: Trading Generality for Performance in Software Transactional Memory Aleksandar Dragojevi´c Tim Harris Add to Reading List Source URL: timharris.uk Language: English - Date: 2014-08-25 06:24:53
147	On Obstruction-Free Transactions Rachid Guerraoui Michał Kapałka EPFL, Switzerland Transactional Memory Add to Reading List Source URL: kapalka.eu Language: English - Date: 2010-10-13 15:43:20
148	STMBench7: A Benchmark for Software Transactional Memory Rachid Guerraoui1 Michał Kapałka1 Add to Reading List Source URL: kapalka.eu Language: English - Date: 2010-10-13 15:43:20
149	Scalable and Reliable Communication for Hardware Transactional Memory Seth H. Pugsley Manu Awasthi Add to Reading List Source URL: www.cs.utah.edu Language: English - Date: 2008-08-19 15:06:57
150	A Case for System Support for Concurrency Exceptions Luis Ceze, Joseph Devietti, Brandon Lucia and Shaz Qadeer† University of Washington {luisceze, devietti, blucia0a}@cs.washington.edu Abstract Add to Reading List Source URL: homes.cs.washington.edu Language: English - Date: 2009-03-19 20:35:38 Data management Data Linearizability Lock Transactional memory Parallel computing Atomicity Serializability Exception handling Computing Concurrency control Transaction processing

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